Van Tien Pham

I am currently a postdoctoral researcher at CEA, Université Paris-Saclay, working within the PEPR IA – HOLIGRAIL project on energy-efficient and hardware-aware AI architectures for embedded systems.
Previously, I was a postdoctoral researcher at the Laboratoire d’Informatique et des Systèmes (LIS), where I worked on efficient multimodal foundation models for anomaly detection.

I obtained my Ph.D. from Université de Toulon, where my thesis on deep neural network compression using pruning and low-rank approximations was awarded the GDR IASIS–GRETSI PhD Thesis Prize as laureate, jointly awarded by Club EEA, GDR IASIS, and GRETSI. It also received the Accessit of the AFRIF 2026 PhD Thesis Prize.

Before that, I was a research engineer at Viettel High Technologies Industry Corporation, contributing to the research and development of virtual reality simulation systems.

I earned my engineering and master’s degrees from Hanoi University of Science and Technology, School of Information and Communications Technology. During this period, I worked at the International Research Institute MICA on object detection, segmentation, and tracking from egocentric vision.

My research interests include efficient and sustainable AI, network compression, tensor methods, multimodal foundation models, and hardware-aware machine learning. I welcome collaborations and discussions on these topics across academia and industry.